Qinsi Wang 


Hello! My name is Qinsi Wang. I am a first-year PhD student in the CEI lab of the Department of Electrical and Computer Engineering at Duke University. I am fortunate to be advised by Prof. Yiran Chen and Prof. Hai "Helen" Li.

Before that, I conducted research at the University of Science and Technology of China and the National University of Singapore, where I was fortunate to be mentored by Prof. Lin Shao. I received my undergraduate degree in Electronic Science and Technology from Huazhong University of Science and Technology.

News 


[ Oct 2024 ] : Our paper CoreInfer: Accelerating Large Language Model Inference with Semantics-Inspired Adaptive Sparse Activation has been uploaded to arXiv. CoreInfer achieves a 10.33x speedup on an NVIDIA Titan XP without sacrificing performance! Visit the project page for more information.

[ Mar 2024 ] : I am excited to announce that I will join the Department of Electrical and Computer Engineering at Duke University as a PhD student in Fall 2024! Looking forward to my PhD life!

[ Sep 2023 ] : Our paper MathNAS: If Blocks Have a Role in Mathematical Architecture Design has been accepted by NeurIPS 2023. MathNAS achieves 82.5% top-1 accuracy on ImageNet-1k! See project page for more information.

[ Apr 2023 ] : Our paper DGL: Device Generic Latency model for Neural Architecture Search has been accepted by the IEEE Transaction on Mobile Computing (CCF A). DGL is dedicated to accelerating the deployment of NAS on mobile devices, and has conducted experiments on 50+ different mobile phones! Visit the project code for more information.

[ Jul 2022 ] : I received my B.S. from Huazhong University of Science and Technology (HUST) and received the title of Outstanding Graduate !

[ Sep 2021 ] : I received the China National Scholarship (0.2%)! This is the highest award given by the Ministry of Education of China for undergraduates.

Publications 


CoreInfer: Accelerating Large Language Model Inference with Semantics-Inspired Adaptive Sparse Activation

Qinsi Wang, Saeed Vahidian, Hancheng Ye, Jianyang Gu, Jianyi Zhang, Yiran Chen

arXiv: 2410.18311



MathNAS: If Blocks Have a Role in Mathematical Architecture Design

Qinsi Wang*, Jinghan Ke*, Zhi Liang, Sihai Zhang

Neural Information Processing Systems (NeurIPS) 2023



Animated

DGL: Device Generic Latency model for Neural Architecture Search 

Qinsi Wang, Sihai Zhang

IEEE Transactions on Mobile Computing, 2023

Hobby 


I love photography and travel, here are some of my favorite photography works and wonderful life moments!



Happy <-